Most of the research in the field of nanoelectronics has been focused on nanodevices and fabrication aspects and as a result a variety of nanodevice technologies have been demonstrated. By contrast, very little work has been reported on the design and evaluation of circuits and computational architectures using nanodevices. There is similarly not much work on the impact of device and fabric (e.g., the 2-D nanowire array) properties on computing. In this paper, we focus on computing architectures based on silicon nanowires.
We explore a simple stream processor developed on 2-D nanowire fabrics and compare its density to a 30nm CMOS implementation. We also identify techniques to work around fabric-specific constraints. Our initial evaluation shows that this stream processor has great density advantage compared to CMOS technology.