Andras’s Lab
(Archival from University of Massachusetts Amherst)

Publications

2023

Compact Model Parameter Extraction using Bayesian Machine Learning

Sachin Bhat, Sourabh Kulkarni, Csaba Andras Moritz
IEEE Computer Society Annual Symposium on VLSI , 2023 , PDF
SkyBridge 2.0: A Fine-grained Vertical 3D-IC Technology for Future ICs

Sachin Bhat, Mingyu Li, Sourabh Kulkarni, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , 2023 , PDF
Improving Effectiveness of Simulation-Based Inference in the Massively Parallel Regime

Sourabh Kulkarni, Csaba Andras Moritz

IEEE Transactions on Parallel and Distributed Systems , 2023 , PDF

2021

Efficient State-space Exploration in Massively Parallel Simulation Based Inference

Sourabh Kulkarni, Csaba Andras Moritz

Parallel and Distributed Systems , 2021 , (In Submission)
Hardware-accelerated Simulation-based Inference of Stochastic Epidemiology Models for COVID-19

Sourabh Kulkarni, Mario Michael Krell, Seth Nabarro, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , 2021 , PDF
A Wafer-scale Manufacturing Pathway for Fine-grained Vertical 3D-IC Technology

Sachin Bhat, Sounak 'Shaun' Ghosh, Sourabh Kulkarni, Mingyu Li, Csaba Andras Moritz

in Proceedings of International Symposium on Quality Electronic Design (ISQED) , 2021 , PDF
SkyBridge-3D-CMOS 2.0: IC Technology for Stacked-Transistor 3D ICs beyond FinFETs

Sachin Bhat, Mingyu Li, Sounak 'Shaun' Ghosh, Sourabh Kulkarni, Csaba Andras Moritz

IEEE Computer Society Annual Symposium on VLSI , 2021 , 2021 ISVLSI Nagarajan Ranganathan Best Paper Award , PDF
Architecting for Artificial Intelligence with Emerging Nanotechnology

Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , 2021 , PDF (In Press)

2020

Accelerating Simulation-based Inference with Emerging AI Hardware

Sourabh Kulkarni, Alexander Tsyplikhin, Mario Michael Krell, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Rebooting Computing (ICRC) , 1-7 , 2020 , PDF.pdf

2019

Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance

Ceylan Morgul, Luca Frontini, Onur Tunali, Ioana Vatajelu, Valentina Ciriani, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu, Mustafa Altun

IEEE Transactions on Nanotechnology , 1-11 , 2019 , PDF
Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling

Serzat Safaltina, Oguz Gencer, Ceylan Morgul, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz, Mustafa Altun

in Proceedings of Design Automation and Test in Europe (DATE) , 1-8 , 2019 , PDF
Reconfigurable Probabilistic AI Architecture for Personalized Cancer Treatment

Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Rebooting Computing (ICRC) , 1-8 , 2019 , PDF

2018

Integrated Synthesis Methodology for Crossbar Arrays

Ceylan Morgul, Luca Frontini, Onur Tunali, Ioana Vatajelu, Valentina Ciriani, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu, Mustafa Altun

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , 1-5 , 2018 , PDF

2017

NP-Dynamic Skybridge: A Fine-Grained 3D IC Technology with NP-Dynamic Logic

JiaJun Shi, Mingyu Li, Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz

IEEE Transactions on Emerging Topics in Computing (TETC) , Vol. 5 , No. 2 , 286 - 299 , 2017 , PDF
Skybridge-3D-CMOS: A Fine-Grained 3D CMOS Integrated Circuit Technology

Mingyu Li, JiaJun Shi, Mostafizur Rahman, Santosh Khasanvis, Sachin Bhat, Csaba Andras Moritz

IEEE Transactions on Nanotechnology, Special Issue on Revolutionary 3-D Integration , Vol. 16 , No. 4 , 639-652 , 2017 , PDF
Magneto-electric Approximate Computational Circuits for Bayesian Inference

Sourabh Kulkarni, Sachin Bhat, Santosh Khasanvis, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Rebooting Computing (ICRC) , In press , 2017 , PDF
Fine-Grained 3D Reconfigurable Computing Fabric with RRAM

Mingyu Li, JiaJun Shi, Sachin Bhat, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , in press , 2017 , PDF
Structure Discovery for Gene Expression Networks with Emerging Stochastic Hardware

Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Rebooting Computing (ICRC) , In Press , 2017 , PDF
SkyNet: Memristor-based 3D IC for Artificial Neural Networks

Sachin Bhat, Sourabh Kulkarni, JiaJun Shi, Mingyu Li, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , In Press , 2017 , PDF
Power -Delivery Network in 3D ICs: Monolithic 3D vs. Skybridge 3D CMOS

JiaJun Shi, Mingyu Li, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , in press , 2017 , PDF

2016

A 14nm FinFET transistor-level 3D partitioning design to enable high-performance and low-cost monolithic 3D IC

JiaJun Shi, Deepak Nayak , Srinivasa Banna, Robert Fox, Srikanth Samavedam, Sandeep Samal, Sung Kyu Lim

IEEE International Electron Devices Meeting (IEDM) , 2.5.1 - 2.5.4 , 2016 , PDF
Towards Automatic Thermal Network Extraction in 3D ICs

Mingyu Li, JiaJun Shi, Mostafizur Rahman, Santosh Khasanvis, Sachin Bhat, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , in press , 2016 , PDF
Skybridge-3D-CMOS: A Vertically-Composed Fine-Grained 3D CMOS Integrated Circuit Technology

Mingyu Li, JiaJun Shi, Mostafizur Rahman, Santosh Khasanvis, Sachin Bhat, Csaba Andras Moritz

IEEE Computer Society Annual Symposium on VLSI , 403-408 , 2016 , PDF
On the Design of Ultra-High Density 14nm Finfet Based Transistor-Level Monolithic 3D ICs

JiaJun Shi, Deepak Nayak , Motoi Ichihashi, Srinivasa Banna, Csaba Andras Moritz

IEEE Computer Society Annual Symposium on VLSI , pp. 449 - 454 , 2016 , PDF
Routability in 3D IC Design: Monolithic 3D vs. Skybridge 3D CMOS

JiaJun Shi, Mingyu Li, Santosh Khasanvis, Mostafizur Rahman, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , 145-150 , 2016 , PDF

2015

Architecting for Causal Intelligence at Nanoscale

Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Ayan K. Biswas, Mohammad Salehi Fashami, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz

IEEE Computer, Special Issue on Rebooting Computing , Vol. 48 , No. 12 , 54-64 , 2015 , PDF, Supplementary-Doc
Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory Circuit

Santosh Khasanvis, Masum K Habib, Mostafizur Rahman, Roger Lake, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , Special Issue on Advances in Design of Ultra-Low Power Circuits and Systems in Emerging Technologies , Vol. 12 , No. 2 , Article 15 , pp. 15:1-15:18, August , 2015 , PDF
Self-similar Magneto-electric Nanocircuit Technology for Probabilistic Inference Engines

Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Mohammad Salehi Fashami, Ayan K. Biswas, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz

IEEE Transactions on Nanotechnology, Special Issue on Cognitive and Natural Computing with Nanotechnology , Vol. 14 , No. 6 , 980-991 , 2015 , PDF ,
[LINK]
Wave Interference Functions for Neuromorphic Computing

Mostafizur Rahman, Santosh Khasanvis, JiaJun Shi, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. 14 , No. 4 , pp. 742-750 , 2015 , PDF ,
[LINK]
Physically Equivalent Magneto-Electric Nanoarchitecture for Probabilistic Reasoning

Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Mohammad Salehi Fashami, Ayan K. Biswas, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 25-26 , 2015 , PDF ,
[LINK]
Architecting 3-D Integrated Circuit Fabric with Intrinsic Thermal Management Features

Mostafizur Rahman, Santosh Khasanvis, JiaJun Shi, Mingyu Li, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 157-162 , 2015 , PDF ,
[LINK]
Manufacturing Pathway and Experimental Demonstration for Nanoscale Fine-Grained 3-D Integrated Circuit Fabric

Mostafizur Rahman, JiaJun Shi, Mingyu Li, Santosh Khasanvis, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , in press , 2015 , PDF
Architecting Connectivity for Fine-grained 3-D Vertically Integrated Circuits

Santosh Khasanvis, Mostafizur Rahman, Mingyu Li, JiaJun Shi, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 175-180 , 2015 , PDF ,
[LINK]
Physically Equivalent Magneto-Electric Nanoarchitecture for Probabilistic Reasoning

Santosh Khasanvis, Mingyu Li, Mostafizur Rahman, Mohammad Salehi Fashami, Ayan K. Biswas, Jayasimha Atulasimha, Supriyo Bandyopadhyay, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 25-26 , 2015 , PDF ,
[LINK]
Unconventional Nanocomputing with Physical Wave Interference Functions

Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, Csaba Andras Moritz

in Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing, J. Atulasimha and S. Bandyopadhyay, Eds., Wiley , pp. 291-328, in press , 2015 , Book Chapter

2014

Skybridge: 3-D Integrated Circuit Technology Alternative to CMOS

Mostafizur Rahman, Santosh Khasanvis, JiaJun Shi, Mingyu Li, Csaba Andras Moritz

arXiv:1404.0607 , pp. 1-52 , 2014 , PDF
Parameter Variation Sensing and Estimation in Nanoscale Fabrics

Jianfeng Zhang, Mostafizur Rahman, Pritish Narayanan, Santosh Khasanvis, Csaba Andras Moritz

Elsevier Journal of Parallel and Distributed Computing, Special Issue on Computing with Future Nanotechnology , Vol. 74 , No. 6 , pp. 2504-2511 , 2014 , PDF
Heterogeneous Graphene-CMOS Ternary Content Addressable Memory

Santosh Khasanvis, Mostafizur Rahman, Csaba Andras Moritz

Elsevier Journal of Parallel and Distributed Computing, Special Issue on Computing with Future Nanotechnology , Vol. 74 , No. 6 , pp. 2497-2503 , 2014 , PDF
Wave-based Multi-valued Computation Framework

Santosh Khasanvis, Mostafizur Rahman, Sankara Narayanan Rajapandian, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 171-176 , 2014 , Best Paper Award , PDF
A New Tunnel-FET based RAM Concept for Ultra-Low Power Applications

Mostafizur Rahman, Mingyu Li, JiaJun Shi, Santosh Khasanvis, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 57-58 , 2014 , PDF

2013

Variability in Nanoscale Fabrics: Bottom-up Integrated Analysis and Mitigation

Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , Vol. 9 , No. 1 , Article 8 , 2013 , PDF
Nanowire Field-Programmable Computing Platform

Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, Pritish Narayanan, H. S. Yu, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 23-25 , 2013 , PDF
Design of 8T-Nanowire RAM Array

Vikram Suresh, Akshaya Shanmugam, Lekshmi Krishnan, Avinash Bijjal, Mostafizur Rahman, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 152-157 , 2013 , PDF
Experimental Prototyping of Beyond-CMOS Nanowire Computing Fabrics

Mostafizur Rahman, Pritish Narayanan, Santosh Khasanvis, John Nicholson, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 134-139 , 2013 , Best Paper Award , PDF
Embedded Processors based on Spin Wave Functions (SPWFs)

Santosh Khasanvis, Sankara Narayanan Rajapandian, Prasad Shabadi, JiaJun Shi, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 32-33 , 2013 , PDF

2012

Integrated Device-Fabric Explorations and Noise Mitigation in Nanoscale Fabrics

Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. 11 , No. 4 , pp. 687-700 , 2012 , PDF
Design Of Spin Wave Functions-Based Logic Circuits

Prasad Shabadi, Sankara Narayanan Rajapandian, Santosh Khasanvis, Csaba Andras Moritz

SPIN, World Scientific Publishing Company , Vol. 2 , No. 3 , Article 1240006 , 2012 , PDF ,
[LINK]
FastTrack: Towards Nanoscale Fault Masking with High Performance

MD Muwyid Khan, Pritish Narayanan, Prachi Joshi, Michael Leuchtenburg, Pavan Panchapakeshan, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. 11 , No. 4 , pp. 720-730 , 2012 , PDF
Heterogeneous Integration of Epitaxial Nanostructures: Strategies and Application Drivers

Chi On Chui, K.-S. Shin, Jorge Kina, K.-H. Shih, Pritish Narayanan, Csaba Andras Moritz

Invited paper in Proc. SPIE 8467, Nanoepitaxy: Materials and Devices IV , Vol. 8 467 , pp. R1-R15 , 2012 , PDF
On-Chip Variation Sensor for Systematic Variation Estimation in Nanoscale Fabrics

Jianfeng Zhang, Pritish Narayanan, Santosh Khasanvis, Jorge Kina, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 1-6 , 2012 , PDF
Ternary Volatile Random Access Memory based on Heterogeneous Graphene-CMOS Fabric

Santosh Khasanvis, Masum K Habib, Mostafizur Rahman, Pritish Narayanan, Roger Lake, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 69-76 , 2012 , PDF
Spin Wave Nanofabric Update

Prasad Shabadi, Santosh Khasanvis, Sankara Narayanan Rajapandian, Csaba Andras Moritz, et al.

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp.196-202 , 2012 , PDF
Integrated Nanowire Systems for Post-CMOS Computing

Mostafizur Rahman, Pritish Narayanan, Csaba Andras Moritz

SRC TECHCON , 2012 , PDF

2011

Energy-Efficient Hardware Data Prefetching

Yao Guo, Pritish Narayanan, Mahmoud Bennasser, Saurabh Chheda, Csaba Andras Moritz

IEEE Transactions on VLSI , Vol. 19 , No. 2 , pp. 250-263 , 2011 , PDF ,
[LINK]
Hybrid Graphene Nanoribbon-CMOS Tunneling Volatile Memory Fabric

Santosh Khasanvis, Masum K Habib, Mostafizur Rahman, Pritish Narayanan, Roger Lake, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 189-195 , 2011 , PDF
3-D Integration Requirements for Hybrid Nanoscale-CMOS Fabrics

Pavan Panchapakeshan, Priyamvada Vijayakumar, Pritish Narayanan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 849-853 , 2011 , PDF
Spin Wave Functions Nanofabric Update

Prasad Shabadi, Alexander Khitun, K. Wong, Pedram Khalili Amiri, Kang L. Wang, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 107-113 , 2011 , Best Paper Award , PDF
Nanoscale Application Specific Integrated Circuits

Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Priyamvada Vijayakumar, K.-S. Shin, Mostafizur Rahman, Michael Leuchtenburg, Israel Koren, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 99-106 , 2011 , PDF
N3ASIC Based Nanowire Volatile RAM

Mostafizur Rahman, Pritish Narayanan, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 1097-1101 , 2011 , PDF
Biased Voting for Improved Yield in Nanoscale Fabrics

MD Muwyid Khan, Pritish Narayanan, Priyamvada Vijayakumar, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

in Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) , pp. 79-85 , 2011 , Best Paper Award , PDF
Impact of Nanomanufacturing Flow on Systematic Yield Losses in Nanoscale Fabrics

Priyamvada Vijayakumar, Pritish Narayanan, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 181-188 , 2011 , PDF
N3ASICs: Designing Nanofabrics with Fine-Grained CMOS Integration

Pavan Panchapakeshan, Pritish Narayanan, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 196-202 , 2011 , PDF
Integrated Nanosystems with Junctionless Crossed Nanowire Transistors

Pritish Narayanan, Pavan Panchapakeshan, Jorge Kina, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 845-848 , 2011 , PDF
3-D Integration Requirements for Hybrid Nanoscale-CMOS Fabrics

Pavan Panchapakeshan, Priyamvada Vijayakumar, Pritish Narayanan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 849-853 , 2011 , PDF
Nanoscale Application Specific Integrated Circuits

Csaba Andras Moritz, Pritish Narayanan, Chi On Chui

in Nanoelectronic Circuit Design, N. K. Jha and D. Chen, Eds. Springer New York , pp. 215-275 , 2011 , Book Chapter ,
Book

2010

Programmable Cellular Architectures at the Nanoscale

Pritish Narayanan, Teng Wang, Csaba Andras Moritz

Nano Communication Networks , Vol. 1 , No. 2 , pp. 77-85 , 2010 , PDF
Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration

Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) , pp. 24-31 , 2010 , PDF
Incorporating Heterogeneous Redundancy in a Nanoprocessor for Improved Yield and Performance

Priyamvada Vijayakumar, Pritish Narayanan, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

in Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) , pp. 273-279 , 2010 , PDF
Towards Logic Functions as the Device

Prasad Shabadi, Alexander Khitun, Pritish Narayanan, Mingqiang Bao, Israel Koren, Kang L. Wang, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 11-16 , 2010 , PDF

2009

Heterogeneous 2-level Logic and its Density and Fault Tolerance Implications in Nanoscale Fabrics

Teng Wang, Pritish Narayanan, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. 8 , Article 1 , pp. 22-30 , 2009 , PDF
Impact of Process Variation on NASIC Nanoprocessors with 2-way Redundancy

Michael Leuchtenburg, Pritish Narayanan, Teng Wang, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 737-739 , 2009 , PDF
Validating Cascading of Crossbar Circuits with an Integrated Device-Circuit Exploration

Pritish Narayanan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 37-42 , 2009 , PDF
Manufacturing Pathway and Associated Challenges for Nanoscale Computational Systems

Pritish Narayanan, Kyoung Won Park, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 119-122 , 2009 , PDF

2008

Image Processing Architecture for Semiconductor Nanowire based Fabrics

Pritish Narayanan, Teng Wang, Michael Leuchtenburg, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 677-680 , 2008 , PDF
CMOS Control Enabled Single-Type FET NASIC

Pritish Narayanan, Michael Leuchtenburg, Teng Wang, Csaba Andras Moritz

IEEE Computer Society Annual Symposium on VLSI , pp. 191-196 , 2008 , Best Paper Award , PDF, Extended PDF
Impact of Process Variation in Fault-Resilient Streaming Nanoprocessors

Michael Leuchtenburg, Pritish Narayanan, Teng Wang, Csaba Andras Moritz

International Conference on Nano-Networks , pp. 26–27 , 2008 , PDF
NASICs: A Nanoscale Fabric for Nanoscale Microprocessors

Teng Wang, Pritish Narayanan, Michael Leuchtenburg, Csaba Andras Moritz

IEEE International Nanoelectronics Conference (INEC) , pp. 989-994 , 2008 , PDF

2007

Fault-Tolerant Nanoscale Processors on Semiconductor Nanowire Grids

Csaba Andras Moritz, Teng Wang, Pritish Narayanan, Michael Leuchtenburg, Yao Guo, Catherine Dezan, Mahmoud Bennasser

IEEE Transactions on Circuits and Systems I, Special issue on Nanoelectronic Circuits and Nanoarchitectures , Vol. 54 , No. 11 , pp. 2422-2437 , 2007 , PDF
Synchronization Coherence: A Transparent Hardware Mechanism for Cache Coherence and Fine-Grained Synchronization

Yao Guo, Vladimir Vlassov, Raksit Ashok, Richard Weiss, Csaba Andras Moritz

Elsevier Journal of Parallel and Distributed Computing (JPDC) , Vol. 68 , No. 2 , pp. 165-181 , 2007 , PDF
Designing Memory Subsystems Resilient to Process Variations

Mahmoud Bennasser, Yao Guo, Csaba Andras Moritz

IEEE Computer Society Annual Symposium on VLSI , pp. 357-363 , 2007 , PDF
Combining 2-level Logic Families in Grid-based Nanoscale Fabrics

Teng Wang, Pritish Narayanan, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 101-108 , 2007 , PDF

2006

Combining Circuit Level and System Level Techniques for Defect-Tolerant Nanoscale Architectures

Teng Wang, Mahmoud Bennasser, Yao Guo, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , 2006 , PDF
Compiler-Based Adaptive Fetch Throttling for Energy Efficiency

Teng Wang, Yao Guo, Israel Koren, C. Mani Krishna

IEEE International Symposium on Performance Analysis of Systems and Software , pp. 112-119 , 2006 , PDF
Towards Defect-Tolerant Nanoscale Architectures

Csaba Andras Moritz, Teng Wang

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 331-334 , 2006 , PDF
Self-Healing Wire-Streaming Processors on 2-D Semiconductor Nanowire Fabrics

Teng Wang, Mahmoud Bennasser, Yao Guo, Csaba Andras Moritz

Nano Science and Technology Institute (NSTI) Nanotech , pp. 312 - 315 , 2006 , PDF
Power and Failure Analysis of CAM Cells Due to Process Variations

Mahmoud Bennasser, Csaba Andras Moritz

IEEE International Conference on Electronics, Circuits and Systems (ICECS) , pp. 608 - 611 , 2006 , PDF

2005

PARE: A Power-Aware Data Prefetching Engine

Yao Guo, Mahmoud Bennasser, Csaba Andras Moritz

International Symposium on Low Power Electronics and Design , pp. 339 - 344 , 2005 , PDF
Wire-Streaming Processors on 2-D Nanowire Fabrics

Teng Wang, Mahmoud Bennasser, Yao Guo, Csaba Andras Moritz

Nano Science and Technology Institute (NSTI) Nanotech , pp. 619 - 622 , 2005 , PDF, Extended PDF

2004

Coupling Compiler-Enabled and Conventional Memory Accessing for Energy Efficiency

Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz

ACM Transactions on Computer Systems (TOCS) , Vol. 22 , Article 2 , pp. 180-213 , 2004 , PDF
Opportunities and Challenges in Application-Tuned Circuits and Architectures Based on Nanodevices

Teng Wang, Zhenghua Qi, Csaba Andras Moritz

in Proceedings of the First Conference on Computing Frontiers , pp. 503 - 511 , 2004 , PDF
Energy Characterization of Hardware-Based Data Prefetching

Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

IEEE International Conference on Computer Design , pp. 518-523 , 2004 , PDF
Runtime Biased Pointer Analysis and Its Application on Energy Efficiency

Yao Guo, Saurabh Chheda, Csaba Andras Moritz

Workshop on Power-Aware Computer Systems (PACS) , pp. 1-12 , 2004 , PDF
Latching on the Wire and Pipelining in Nanoscale Designs

Csaba Andras Moritz, Teng Wang

Workshop on Non-Silicon Computation , pp. 1-7 , 2004 , PDF
Runtime Biased Pointer Analysis and Its Application on Energy Efficiency

Yao Guo, Saurabh Chheda, Csaba Andras Moritz

Workshop on Power-Aware Computer Systems (PACS) , pp. 1-12 , 2004 , PDF
Latching on the Wire and Pipelining in Nanoscale Designs

Csaba Andras Moritz, Teng Wang

Workshop on Non-Silicon Computation , pp. 1-7 , 2004 , PDF
Combining Compiler and Runtime IPC Predictions to Reduce Energy in Next Generation Architectures

Saurabh Chheda, Osman Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

in Proceedings of the First Conference on Computing Frontiers , pp. 240 - 254 , 2004 , PDF

2003

Cool-Cache: A Compiler-Enabled Energy Efficient Data Caching Framework for Embedded/Multimedia Processors

Osman Unsal, Rakshit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

Embedded Computing Systems , Vol. 2 , No. 3 , pp. 373-392 , 2003 , PDF
Improved Modeling and Data-Migration for Dynamic Non-Uniform Cache Access

Christopher Cowell, Csaba Andras Moritz, Wayne Burleson

International Symposium on Computer Architecture , 2003 , PDF
An Analysis of Scalar Memory Accesses in Embedded and Multimedia Systems

Osman Unsal, Zhenlin Wang, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

High Performance Memory Systems , 2003 , PDF

2002

Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling

Osman Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

IEEE Computer Architecture Letters , Vol. 1 , 2002 , PDF
Cool-Mem: Combining Statically Speculative Memory Accessing with Selective Address Translation for Energy Efficiency

Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz

Architectural Support for Programming Languages and Operating Systems , pp. 133-143 , 2002 , PDF
The Minimax Cache: An Energy-Efficient Framework for Media Processors

Israel Koren, Csaba Andras Moritz, C. Mani Krishna

International Symposium on High-Performance Computer Architecture , pp. 131-140 , 2002 , PDF

2001

LoGPC: Modeling Network Contention in Message-Passing Programs

Csaba Andras Moritz, Matthew I. Frank

Elsevier Journal of Parallel and Distributed Computing (JPDC) , Vol. 12 , No. 4 , pp. 404 - 415 , 2001 , PDF
Memory Systems: Overview and Trends

Saurabh Chheda, Jeevan Kumar Chittamuru, Csaba Andras Moritz

Encyclopedia Of Life Support Systems , 2001 , PDF
SimpleFit: a Framework for Analyzing Design Tradeoffs in Raw Architectures

Csaba Andras Moritz, Donald Yeung, Anant Agarwal

Parallel and Distributed Processing Techniques and Applications , Vol. 12 , No. 7 , pp. 730 - 742 , 2001 , PDF
Performance Modeling and Evaluation of MPI

Khalid Al-Tawil, Csaba Andras Moritz

Elsevier Journal of Parallel and Distributed Computing (JPDC) , Vol. 61 , pp. 202-223 , 2001 , PDF
On Memory Behavior of Scalars in Embedded Multimedia Systems

Osman Unsal, Zhenlin Wang, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

Workshop on Memory Performance Issues , 2001 , PDF
Cool-Cache for Hot Multimedia

Osman Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz

International Symposium on Microarchitecture , pp. 274-283 , 2001 , PDF

1999

Hot Pages: Software Caching for Raw Microprocessors

Csaba Andras Moritz, Matthew I. Frank, Walter Lee

MIT-LCS Technical Memo , 1999 , PDF
Parallelizing Applications into Silicon

Jonathan Babb, Martin Rinard, Csaba Andras Moritz, Walter Lee, Rajeev Barua, Saman Amarasinghe

IEEE Symposium on Field-Programmable Custom Computing Machines , pp. 70-80 , 1999 , PDF

1998

Exploring Cost-Performance Optimal Designs of Raw Microprocessors

Csaba Andras Moritz, Donald Yeung, Anant Agarwal

IEEE Symposium on Field-Programmable Custom Computing Machines , pp. 12-27 , 1998 , PDF
SUDS: Primitive Mechanisms for Memory Dependence Speculation

Matthew I. Frank, Csaba Andras Moritz, Benjamin Greenwald, Saman Amarasinghe, Anant Agarwal

MIT-LCS Technical Memo , 1998 , PDF
LoGPC: Modeling Network Contention in Message-Passing Programs

Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , Vol. 26 , No. 1 , pp. 404-415 , 1998 , PDF
LoGPC: Modeling Network Contention in Message-Passing Programs

Csaba Andras Moritz, Matthew I. Frank

ACM Joint International Conference on Measurement and Modeling of Computer Systems , Vol. 26 , No. 1 , pp. 254-263 , 1998 , sigmetrics98.pdf

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