Andras’s Lab
(Archival from University of Massachusetts Amherst)

Chi On Chui

History

Member for: 11 years 9 months

Publications

Variability in Nanoscale Fabrics: Bottom-up Integrated Analysis and Mitigation

Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , Vol. No. 9 , Issue No. 1 , 2013 , PDF
Nanowire Field-Programmable Computing Platform

Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, Pritish Narayanan, H. S. Yu, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 23-25 , 2013 , PDF
Integrated Device-Fabric Explorations and Noise Mitigation in Nanoscale Fabrics

Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. No. 11 , Issue No. 4 , pp. 687-700 , 2012 , PDF
Heterogeneous Integration of Epitaxial Nanostructures: Strategies and Application Drivers

Chi On Chui, K.-S. Shin, Jorge Kina, K.-H. Shih, Pritish Narayanan, Csaba Andras Moritz

Invited paper in Proc. SPIE 8467, Nanoepitaxy: Materials and Devices IV , Vol. No. 8467 , pp. R1-R15 , 2012 , PDF
On-Chip Variation Sensor for Systematic Variation Estimation in Nanoscale Fabrics

Jianfeng Zhang, Pritish Narayanan, Santosh Khasanvis, Jorge Kina, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 1-6 , 2012 , PDF
Nanoscale Application Specific Integrated Circuits

Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Priyamvada Vijayakumar, K.-S. Shin, Mostafizur Rahman, Michael Leuchtenburg, Israel Koren, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 99-106 , 2011 , PDF
Integrated Nanosystems with Junctionless Crossed Nanowire Transistors

Pritish Narayanan, Pavan Panchapakeshan, Jorge Kina, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 845-848 , 2011 , PDF
3-D Integration Requirements for Hybrid Nanoscale-CMOS Fabrics

Pavan Panchapakeshan, Priyamvada Vijayakumar, Pritish Narayanan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 849-853 , 2011 , PDF
Nanoscale Application Specific Integrated Circuits

Csaba Andras Moritz, Pritish Narayanan, Chi On Chui

in Nanoelectronic Circuit Design, N. K. Jha and D. Chen, Eds. Springer New York , pp. 215-275 , 2011 , Book Chapter
Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration

Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) , pp. 24-31 , 2010 , PDF
Validating Cascading of Crossbar Circuits with an Integrated Device-Circuit Exploration

Pritish Narayanan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 37-42 , 2009 , PDF
Manufacturing Pathway and Associated Challenges for Nanoscale Computational Systems

Pritish Narayanan, Kyoung Won Park, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 119-122 , 2009 , PDF